IBM scientists’ memory breakthrough stores 3 bits of data per cell

18 May 2016

IBM scientists have achieved a storage memory breakthrough with a new technology called PCM that extends storage from 3,000 writes to 10,000 writes

The days of RAM might be numbered. Scientists at IBM Research have, for the first time, demonstrated the ability to reliably store three bits of data per cell, using a new memory technology known as phase-change memory (PCM).

Previously, scientists at IBM and other institutes have successfully demonstrated the ability to store one bit per cell in PCM but, this week, at the IEEE International Memory Workshop in Paris, IBM scientists are presenting, for the first time, research on successfully storing three bits per cell in a 64k-cell array at elevated temperatures and after 1m endurance cycles.

The breakthrough couldn’t come at a better time, allowing it to capture the exponential growth of data that will come from the surge in mobile device ownership and the internet of things (IoT).

‘Reaching three bits per cell is a significant milestone because, at this density, the cost of PCM will be significantly less than DRAM and closer to flash’

PCM has been exciting the tech industry for a number of years, but ensuring its endurance has been elusive.

Unlike Dynamic Random Access Memory (DRAM), PCM doesn’t lose data when powered off and can endure at least 10m write cycles, compared to typical flash USB sticks, which have a maximum capacity of 3,000 write cycles.

IBM’s scientists envision a vast array of potential standalone PCM and hybrid PCM/flash applications using PCM as an extremely fast cache.

PCM in mobile phones, for example, could enable the phone to launch in seconds.

In the enterprise and big data space, entire databases could be stored in PCM for fast processing for critical online applications.

Machine-learning algorithms using large datasets could also see a significant speed boost by reducing the latency overhead when reading the data between iterations.

What is PCM?

PCM materials exhibit two stable states, the amorphous (without a clearly defined structure) and crystalline (with structure) phases, of low and high electrical conductivity, respectively.

To store a ‘0’ or a ‘1’, known as bits, on a PCM cell, a high or medium electrical current is applied to the material.

A ‘0’ can be programmed to be written in the amorphous phase or a ‘1’ in the crystalline phase, or vice versa. Then, to read the bit back, a low voltage is applied. This is how re-writable Blu-ray disks store videos.

“Phase change memory is the first instantiation of a universal memory with properties of both DRAM and flash, thus answering one of the grand challenges of our industry,” said Dr Haris Pozidis, an author of the paper and the manager of non-volatile memory research at IBM Research Zurich.

“Reaching three bits per cell is a significant milestone because at this density the cost of PCM will be significantly less than DRAM and closer to flash.”

Memories could be made of this

To achieve multi-bit storage, IBM scientists have developed two innovative enabling technologies: a set of drift-immune cell-state metrics and drift-tolerant coding and detection schemes.

More specifically, the new cell-state metrics measure a physical property of the PCM cell that remains stable over time, and are thus insensitive to drift, which affects the stability of the cell’s electrical conductivity with time.

To provide additional robustness of the stored data in a cell over ambient temperature fluctuations, a novel coding and detection scheme is employed.

This scheme adaptively modifies the level thresholds that are used to detect the cell’s stored data so that they follow variations due to temperature change. As a result, the cell state can be read reliably over long time periods after the memory is programmed, thus offering non-volatility.

“Combined, these advancements address the key challenges of multi-bit PCM, including drift, variability, temperature sensitivity and endurance cycling,” said Dr Evangelos Eleftheriou, IBM Fellow.

The experimental multi-bit PCM chip used by IBM scientists is connected to a standard integrated circuit board. The chip consists of a 2×2 Mcell array with a four-bank interleaved architecture.

The memory array size is 2×1000μm×800μm. The PCM cells are based on doped-chalcogenide alloy and were integrated into the prototype chip serving as a characterisation vehicle in 90nm CMOS baseline technology.

Storage technology image via Shutterstock

John Kennedy is a journalist who served as editor of Silicon Republic for 17 years